0.35 m 22W Multiphase Programmable Clock Generator for Circular Memory SC FIR Filter For Wireless Sensor Applications

نویسندگان

  • Rafal Dlugosz
  • Krzysztof Iniewski
  • Tomasz Talaska
چکیده

The paper presents the programmable multiphase clock generator for switched-capacitor finite impulse response (SC FIR) circular memory filters. The proposed programmable clock circuit enables easy division of such kind of filters into different orders smaller sections, which when connected in series, lead to increase in filter efficiency: reduction of chip area, power dissipation, and rising up of the speed. The proposed clock generator enables adjustment of the impulses width, that simplifies design process and leads to structure, which is more robust to process variation. The clock circuit realized in CMOS 0.35μm technology, dissipates 22 μW from 2 V power supply.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Programmable Switched Capacitor Finite Impulse Response Filter with Circular Memory Implemented in CMOS 0.18 µm Technology

This paper presents a programmable multi-mode finite impulse response (FIR) filter implemented as switched capacitor (SC) technique in CMOS 0.18 μm technology. Intended application of the described circuit is in analog base-band filtering in GSM/WCDMA systems. The proposed filter features a regular structure that allows for elimination of some parasitic capacitances, thus significantly improvin...

متن کامل

Impact of the Choice of Technologies and FPGA Devices Design in the Performances of generic FIR Filter for Software Defined Radio Systems

Software Defined Radio (SDR) is a technology that enables re-configurable system architectures for wireless networks and user terminals. A multitude of wireless communication services and algorithms can be supported by the same infrastructure design. The choice of platforms and product family will have a major impact on power consumption, cost, radio data rates, and system flexibility. Field pr...

متن کامل

VLSI Implementation of FIR Filter Using Computational Sharing Multiplier Based on High Speed Carry Select Adder

Recent advances in mobile computing and multimedia applications demand high-performance and lowpower VLSI Digital Signal Processing (DSP) systems. One of the most widely used operations in DSP is Finite-Impulse Response (FIR) filtering. In the existing method FIR filter is designed using array multiplier, which is having higher delay and power dissipation. The proposed method presents a program...

متن کامل

An Asynchronous Programmable Parallel 2-D Image Filter CMOS Ic Based on the Gilbert Vector Multiplier

A novel analogue power-efficient 2-D programmable finite impulse response image filter is proposed. This solution is based on the current-mode Gilbert-vector-multiplier operating in the weak inversion region, which allows for ultra low power operation. The main advantage is in the asynchronous and parallel calculation of all pixel values without using any clock generator. The filter is a progra...

متن کامل

Stochastic Inner Product Core for Digital FIR Filters

The computational operations of stochastic computing (SC) are governed by probability rules which is different from conventional arithmetic computations. Applications of SC to digital signal and image processing problems have been recently reported in the literature. To improve the computational performance of SC based finite impulse response (FIR) digital filters, a new stochastic inner produc...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2006